1. Field of the Invention
This invention relates to the field of ping-pong amplifiers, and particularly to techniques for reducing low frequency noise and offset voltage errors for such amplifiers.
2. Description of the Related Art
Ping-pong amplifiers are well known and widely used due to their low input offset voltages. A schematic diagram of a basic ping-pong amplifier 10 is shown in FIG. 1. Two gain amplifiers A1 and A2, each of which has differential inputs and outputs, receive a differential input signal made up of signals INP and INN. The ping-pong amplifier also typically includes an output amplifier A0, which is connectable to the outputs of A1 via a pair of switches S1 and S2, or to the outputs of A2 via a pair of switches S3 and S4.
A pair of fully differential nulling amplifiers A3 and A4 are used to auto-zero A1 and A2, respectively; the inputs of A3 and A4 are connected to the outputs of A1 and A2 via pairs of switches S5/S6, and S7/S8. A pair of memory capacitors C1 and C2 are connected to the inputs of A3, and capacitors C3 and C4 are connected to A4""s inputs. A switch S9 is connected between the inputs of A1, and a switch S10 is connected between the inputs of A2. A switch S11 is connected between the differential input signal and one of A1""s inputs, and a switch S12 is connected between the differential input signal and one of A2""s inputs.
The switches are controlled with a control circuit (not shown), which operates them in accordance with the timing diagram shown in FIG. 1a. The ping-pong amplifier has a two-phase timing cycle. During the first phase (xcfx861), switches S5, S6 and S9 are closed, such that amplifier A1 is auto-zeroed by the output currents of nulling amplifier A3, with the error signals stored on memory capacitors C1 and C2. Switches S3, S4 and S12 are also closed, allowing the differential input signal to be amplified by A2 followed by A0. The roles are reversed during the second phase (xcfx862): switches S7, S8 and S10 are closed such that A2 is auto-zeroed by A4 (with the error signals stored on memory capacitors C3 and C4), and switches S1, S2 and S11 are closed such that the input signal is amplified by A1 followed by A0.
Auto-zeroing is effective in reducing offset voltage and 1/f noise. However, the technique suffers from aliasing of wideband noise into the frequency range between DC and the auto-zeroing frequency. Because of this, the low frequency noise spectral density of a conventional auto-zeroed amplifier is several times higher than the thermal noise of a conventional CMOS op amp.
Some amplifiers seek to reduce offset voltage and 1/f noise by xe2x80x9cchoppingxe2x80x9d the input and output of the amplifier; i.e., modulating a low frequency input signal up to near a chopping frequency, where it is amplified and modulated back down to the original frequency. This technique does not suffer from wideband noise aliasing. However, chopping also modulates the offset voltage up to the chopping frequency, resulting in a large energy at the chopping frequency. This energy limits the usable bandwidth, and often requires filtering.
A ping-pong amplifier and method are presented which overcome the problems noted above. The invention employs auto-zeroing and chopping to simultaneously achieve low offset voltage and low low frequency noise, as well as low energy at the chopping frequency.
The novel ping-pong amplifier includes respective nulling amplifiers for each of its gain amplifiers, which auto-zero each gain amplifier. In addition, switches are included which allow the differential inputs and outputs of the gain amplifiers to be chopped. Thus, while one gain amplifier is being auto-zeroed, the other gain amplifier amplifies the input signal while its inputs and outputs are chopped.
One of the described embodiments includes circuitry which reduces switching transients that might otherwise appear in the amplifier""s output. Here, each of gain amplifiers A1 and A2 includes a common-mode reference voltage input CMR connected to receive a common-mode reference voltage VCMR, and a common-mode feedback circuit; VCMR is typically set to a value between the amplifier""s power rails so that the amplifier may have a high gain. The common-mode feedback circuit sets the amplifier""s common-mode output voltage xe2x80x94given by the sum of its differential outputs divided by 2xe2x80x94so that each of its outputs is nominally set to VCMR when the differential output voltage is zero. The ping-pong amplifier includes an error amplifier, which has one input connected to common-mode reference voltage VCMR, its other input switchably connected to the common-mode output of one of the two gain amplifiers A1 and A2, and an output which is switchably connected to the CMR inputs of A1 and A2. Respective memory capacitors are connected to the two CMR inputs. In operation, the error amplifier""s input is periodically connected to the common-mode output of A1, and its output is connected to A1""s CMR input. This arrangement forms a closed-loop which forces A1""s common-mode output voltage (referred to herein as xe2x80x9cVCMR1xe2x80x9d) to be equal to VCMR; the error amplifier""s output voltage is stored on the memory capacitor connected to A1""s CMR input. Similarly, the error amplifier""s input and output are periodically connected to A2""s common-mode output and CMR input, respectively, to force A2""s common-mode output voltage (referred to herein as xe2x80x9cVCMR2xe2x80x9d) to be equal to VCMR, with the error amplifier""s output voltage stored on the memory capacitor connected to the A2""s CMR input. The voltages stored on the memory capacitors continuously adjust the common-mode output voltages so that VCMR1 and VCMR2 are held equal to VCMR. Keeping VCMR1=VCMR2=VCMR ensures that transients due to mismatch in the common-mode feedback circuit are largely reduced.
Further features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.